Field
Implementations of the present disclosure generally relate to an apparatus and methods for forming a film on a semiconductor substrate.
Description of the Related Art
Semiconductor device geometries have dramatically decreased in size since their introduction several decades ago. Modern semiconductor fabrication equipment routinely produces devices with 45 nm, 32 nm, and 28 nm feature sizes, and new equipment is being developed and implemented to make devices with even smaller geometries. The decreasing device sizes result in structural features having decreased width within the formed device. As features narrow in width, filling features with dielectric material becomes more challenging. Dielectric material deposition processes are prone to generating seams or voids in a feature formed on a substrate without completely filling the feature. Advanced gap fill applications employ flowable chemical vapor deposition processes to form a planarized dielectric film while preventing the formation of voids or seams in the feature.
The typical process for gap fill applications involves a bulk film deposition step at low temperatures, a thermal or non-thermal curing process for film composition conversion after the bulk film deposition, and a final densification process at elevated temperatures. During the bulk film treatment and densification processes, the act of curing can cause the film to form regions that have different material properties, which often leads to variations in film quality.
In particular, when features are bulk filled, curing results in cross-linking and densification first near the surface of the deposited layer formed over the feature. This surface phenomenon, which is often called “crusting,” prevents the ultraviolet light from penetrating deeper into the features, and thus prevents complete cross-linking and densification throughout the deposited material layer. The variation in the “curing” in different regions of the deposited layer creates a gradient in the optical, physical and electrical properties of the deposited layer, such as a gradient in the dielectric constant across the thickness of the deposited layer, which can affect the device's electrical performance and device yield.
Also, deployment of new smaller electrical devices reduces the thermal budget for deposition of dielectric materials at advanced nodes. Traditional bulk film deposition requires a final densification process at temperatures that may range from 300 degrees Celsius to 1100 degrees Celsius. Such high temperatures may damage advanced materials such as selenium germanium (SixGey) and Group III-V compounds used in these advanced nodes.
Therefore, there is a need for improved methods for depositing and forming dielectric layers used in advanced nodes.